The Week Memory Ate Compute: FeNAND 20x, PIM, and the 72 Hours the Interposer Swallowed the Substrate

Overview: Six New Memory Classes in Seven Days

On October 14, Seoul hosted the JEDEC AI Memory Forum. On its surface, a routine standards gathering. In practice, it was the day Samsung and SK Hynix jointly unveiled LPDDR-PIM (low-power DRAM with processing-in-memory) for the first time, and the same day SK Hynix published research showing that 3D FeNAND performs MAC operations inside the memory cell, delivering 20x throughput in simulation. Two days later, SK Hynix President An Hyun formalized a roadmap for HBF (High Bandwidth Flash) and 3D-stacked DRAM, declaring that "HBM alone cannot absorb AI's surging demand."

Across the Pacific the same week, at OCP Global Summit, Nvidia unveiled next-generation CPO that moves the optical engine off the organic substrate and onto the silicon interposer, co-planar with HBM; AMD launched Verona Epyc, the industry's first CPU to support SOCAMM2 memory; Samsung published an AI-memory roadmap combining HBM5 + CXL + persistent storage.

Six new memory classes in 72 hours. HBF, 3D DRAM, FeNAND, LPDDR-PIM, SOCAMM2, interposer-CPO. This is not a release rush. It is the week memory ate compute, the interposer ate the substrate, and silicon's traditional boundaries began to dissolve.

Why All at Once

Two triggers forced the simultaneity.

The first is demand pressure. Korean semiconductor exports hit $43.1B in September, up 216% YoY — another all-time high. DDR5 16Gb spot sits at $60.43, roughly 3x year-ago levels. SK Hynix is expected to break the 80% operating-margin barrier in Q3. And yet Hynix stock has fallen 23% over six consecutive sessions, while foreign investors have dumped Samsung and Hynix and piled into equipment vendors like TechWing (Q3 revenue +110% YoY, OP +153% YoY).

The second is structural fear. In the same week, CXMT unveiled new chip technology that spiked volatility in Korean memory names, and Elon Musk publicly stated that "China is catching up in generic DRAM but still struggles with HBM and 3D stacking." The subtext: while China copies yesterday's HBM, Korea now has to ship tomorrow's memory.

Those two pressures collided, and SK Hynix elevated "memory hierarchy redesign" from an engineering slide to official corporate strategy.

PIM, FeNAND, HBF — Three Vectors Pointing the Same Way

The three technologies look different but share a single premise: moving data to the CPU is the single most expensive operation in the AI stack. All three attack that cost.

• LPDDR-PIM: embeds compute units inside low-power DRAM so vector and multiply operations happen in memory. Edge AI and laptops first.
• FeNAND (3D ferroelectric NAND): performs MAC operations inside non-volatile cells; simulations show 20x throughput. Solve write endurance and it becomes an analog inference core.
• HBF (High Bandwidth Flash): ports HBM-style stacking onto NAND — HBM bandwidth × NAND density. The "hot tier" storage for the trillion-parameter era.

All three break the classic von-Neumann flow of fetching data to the CPU. That is the engineering substance behind An Hyun's phrase "memory hierarchy optimization."

Why the Interposer Is the Fulcrum

Nvidia's CPO announcement matters because of where the optical engine moves to. Historically, electrical-to-optical conversion happened on the organic package substrate. Nvidia's new design places the optical engine on the silicon interposer, co-planar with the HBM stacks. In one stroke the interposer becomes:

1. The floor for HBM stacks (existing),
2. The floor for PIM-DRAM and FeNAND compute-memory (new),
3. The floor for optical I/O (new).

All three now share the same 2.5D/3D structure. That is why Applied Materials just opened a $5B EPIC R&D center in California alongside Samsung, SK Hynix and TSMC; why Applied has publicly committed to adding 2 percentage points of WFE market share by 2030; and why Dutch supplier ProDrive is opening a Korea office to support Hanwha SemiTech. The next decade of semi CapEx will be fought on the interposer + packaging + materials layer.

Positioning Implications

Short-term, the divergence hurts. 80% operating margin vs. a six-day foreign-investor dump. Record exports vs. a 4% semi-index drawdown post-CPI. But the character of the divergence is not "cycle is over." It is "the axis of the cycle is shifting."

• Memory incumbents (005930, 000660): the end of the HBM-only narrative is a multiple-rerating risk, but HBF, PIM and 3D DRAM introduce the next re-rating vector. Much of the current foreign selling is less a view that the earnings peak is in and more a function of the next tier's price not yet being visible.
• Equipment and backend vendors: interposer, CPO and PIM packaging all demand more process steps and longer tool time. TechWing (+110%), Hanool Semiconductor (breaking Japan's MLCC inspection monopoly at Delta Electronics), Hanwha SemiTech (ProDrive co-location) — the Korean backend chain is the mirror beneficiary of the memory giants' stock volatility.
• CapEx safety valve: Applied's +2pp WFE guidance rests on AI CapEx expanding the entire WFE pie. The 15 Korean suppliers heading to SEMICON West 2026 to court North American business are the same signal, bottom-up.

Bottom Line

The week's news flow didn't say "HBM is over." It said "HBM has become the first layer of a hierarchy" — and in the same seven days declared the second, third and fourth layers. FeNAND 20x, LPDDR-PIM, HBF, Nvidia CPO, SOCAMM2: all point one way. Data stops moving to compute. Compute moves to data. And it all happens on the same interposer.

The current price-fundamentals divergence is not the end of the cycle; it is the middle gap where the next tier's price has not yet been discovered.

Key Sources: - SK Hynix President: New Memory Era Starting with HBF, 3D DRAM (Money Today, 2026-10-14) - SK Hynix unveils FeNAND AI computing with 20x throughput gains (The Elec, 2026-10-14) - Samsung, SK Hynix to Present LPDDR-PIM at JEDEC AI Memory Forum (The Elec, 2026-10-14) - Nvidia develops next-gen CPO with optical engines on chip interposer (The Elec, 2026-10-14) - HBM Alone Isn't Enough: AI Memory Moves to Layered Architecture (JoongAng Ilbo, 2026-10-14) - plus 6 more