The Backend-Doubling Signal — Why Chiayi Phase 2 and Arizona's Test Hub Broke Ground Inside the Same 48 Hours

Forty-Eight Hours, Two Shovels

On Thursday, July 11, the board of King Yuan Electronics (KYEC, 京元電) — Taiwan's largest outsourced semiconductor test house — approved up to $1.4 billion (~NT$44.9B) to build its first US test fab in Arizona. The next morning, Taiwan's NSTC formally broke ground on Chiayi Science Park Phase 2, a 90-hectare expansion anchored by TSMC's advanced packaging cluster with build-out extending through 2031.

Inside a single 48-hour window, Taiwan committed to excavating its domestic backend line and replicating that same line in Arizona at the same time. This is not a geographic diversification decision. This is the entire industry conceding that no single location can fill the demand curve on its own.

Why Now — Three Simultaneous Pressures

First, CoWoS overflow is already spilling to OSATs. Reporting on July 13 confirmed that TSMC's CoWoS capacity remains severely constrained despite six Taiwan site expansions and two planned Arizona fabs, and that Intel's chase of US CSP ASIC packaging is pushing overflow orders to Taiwan OSATs. The market has already priced in the fact that TSMC alone cannot absorb backend demand.

Second, the per-unit memory ceiling broke. Bloomberg's Mark Gurman reports Apple's M7 Ultra will support up to 1.5TB of unified memory — a full 2x the 768GB planned for M5 Ultra. Current smart vehicles now require a minimum of 40GB DRAM and up to 500GB–1.5TB NAND per car. TrendForce projects H2 2026 SLC NAND contract prices will surge 120–170% versus H1 as high-layer 3D NAND crowds out mature-node capacity, leaving industrial, automotive, and networking demand nowhere to go.

Third, memory has started pulling logic. Nanya Technology (2408-TW) posted Q2 2026 revenue of NT$82.5B (+68% QoQ), gross margin of 79.5%, and EPS of NT$14.66 — driven by DRAM ASP surging 60%+ QoQ. FactSet consensus lifted 2026 EPS to NT$58.67 with a 12-month target of NT$555. Nomura's Taiwan fund manager flagged three persistent bottlenecks running to 2027: T-Glass substrates, DRAM/HBM memory, and CoWoS advanced packaging. SK Hynix CEO Kwak Noh-jung, on his firm's Nasdaq IPO day, called 2027 "the worst memory supply shortage year in history."

Intel's EMIB-T and the American Pressure

At IEEE ECTC 2026, Intel unveiled EMIB-T (Embedded Multi-die Interconnect Bridge with TSVs), a direct challenger to CoWoS. The Trump administration is publicly pressing Intel to scale advanced packaging at New Mexico. The result: KYEC's Arizona commitment reads inside that context — the moment TSMC Arizona fires up, a test house must sit next door for cycle-time math to work.