The Week Memory Forked Three Ways — cHBM, Inference LPDDR, and the Twilight of the Standard SKU

What the surface says — and doesn't

Korea posted record May exports of $87.7B, with semiconductors taking a 42% share. DRAM contract prices reportedly surged 98%. DDR5 16Gb spot ticked $42.57 on June 2. The HANARO Fn K-Semi ETF absorbed KRW 1 trillion in two weeks, crossing KRW 4T in AUM. Brokers walked Samsung Electronics' target to KRW 610,000. KOSPI overtook India to become the world's 6th largest market cap.

The surface message is monolithic: HBM supercycle. But the signals coming out of GTC Taipei and Computex this week point exactly the other way. "Memory" as a single category is forking three ways — and the Korean duopoly now has to play offense on all three fronts simultaneously.

Fork 1 — cHBM: the twilight of the JEDEC standard

SK Group Chairman Chey Tae-won met Jensen Huang at GTC Taipei on June 1 — their third meeting this year. The agenda is no longer HBM4 12-high allocation. It is cHBM (custom HBM) — bespoke HBM with customer-specific base die, controller, and interface. SK Hynix supplies standard HBM4 into NVIDIA's Vera Rubin platform now, but from the next generation onward, the SKU itself becomes customer-defined.

Samsung is hitting the same target from a different angle. It announced what it calls the world's first cross-generation HBM connectivity design IP — compatibility across HBM3/4/4E/5, so customers can swap memory generations without redesigning the package. A bespoke layer riding on top of the JEDEC standard.

This fork rewrites the pricing structure. Standard HBM has a spot quote; cHBM does not. Margins get scattered into private contracts, and supplier switching costs go vertical. SK Hynix CEO Kwak Noh-jung pinning HBM4 yield stability as priority one fits the same logic — wobble on the standard SKU and your cHBM negotiating leverage collapses.

Fork 2 — Inference LPDDR: the stack that bypasses HBM

Same week, exact opposite signal. Qualcomm unveiled its "Dragonfly" datacenter brand at Computex with the AI200 inference accelerator carrying 768GB of LPDDR — not HBM. NVIDIA's newly unveiled Vera CPU uses LPDDR5X. ByteDance reportedly joined the LPU (inference-specialized) camp that engineers around HBM entirely.

The logic is simple. Inference workloads bottleneck on KV-cache capacity more often than on bandwidth. HBM costs 5–7× per GB versus LPDDR, and inference does not recover that premium. So part of the "memory slot" budget is migrating to LPDDR — inference, agentic AI, edge first.